AI Drives New Requirements for Integrated Circuit Testing: Faster and More Reliable

AI The application of models has now penetrated various industries, from assisting people in writing emails to enabling microcontrollers at the network edge to interpret the semantics of IoT sensor data, all within its coverage. AI This trend has generated a massive demand for computing resources, especially CPUs, GPUs, and various specialized accelerators used in data centers for training and running large language models. CPU 、 GPU and various specialized accelerators ( XPU ). Chips used for training and inference have one core feature: the need for high-speed throughput of massive data. To avoid data connections becoming a performance bottleneck, current integrated circuits (ICs) all adopt ultra-high-speed interfaces, with single-channel rates reaching up to AI . Through complex multi-channel configurations, efficient data management is achieved. This also poses new challenges for integrated circuit test equipment manufacturers, forcing them to redesign the architecture of test machines and the components used in key signal paths to achieve stable and efficient testing of high-bandwidth interfaces. AI Integrated Circuit ( IC ) all adopt ultra-high-speed interfaces, with single-channel rates reaching up to 64 Gbps , and through complex multi-channel configurations achieve efficient data management. This also poses new challenges for integrated circuit test equipment manufacturers, forcing them to redesign the architecture of test machines and the components used in key signal paths to achieve stable and efficient testing of high-bandwidth interfaces.

AI Challenges in Chip Testing

Many features of modern integrated circuits greatly increase the difficulty of testing. These chips often have hundreds or even thousands of external pins, most of which need to cooperate to build and run functional tests inside the chip; the integrated functions are highly complex, requiring more refined testing processes; and the high-end ultra-high-speed interfaces they carry require reconfiguration of the test system when switching to loopback test mode. All test configuration adjustments must be automated, as manual intervention or replacement of test boards would significantly slow down the testing process, creating bottlenecks and delaying mass production of these core components. The low operating voltage of modern integrated circuits also brings new testing challenges: the chip's sensitivity to electrical noise is significantly increased. The same millivolt noise interference is easier to identify and handle when injected into volt-level signals, but much harder when injected into lower volt-level signals. In addition, the multi-level signal transmission technology used by high-performance buses at low frequencies means that even slight signal distortion caused by components on the test board can lead to test failures. Cutting-edge integrated circuits operate at extremely high clock frequencies, often reaching several gigahertz, which is also a major difficulty in testing. At this frequency, any signal delay, even caused by excessively long wiring, increases testing difficulty. Moreover, the transmission characteristics of digital signals on circuit boards at this frequency increasingly resemble those of RF signals, requiring components used not to alter the transmission line characteristics of the PCB. 100  millivolt 5  volt 1.5  volt PCB High-density routed high-speed signals (such as bus structures inside integrated circuit packages or signals between package wiring and pins) can generate crosstalk due to mutual coupling effects between conductors. These reactive components damage signal integrity, causing signal logic states to be misread at best, or jitter (i.e., slight delays or advances in actual signal arrival time relative to expected time) at worst, ultimately leading to logic errors. The combination of these factors makes modern testing required by applications a complex system engineering task. The design of test boards must achieve automatic reconfiguration switching functions while minimizing attenuation of high-speed signals. AI testing work required by modern applications GPU The design of test boards must achieve automatic reconfiguration switching functions while minimizing attenuation of high-speed signals.

Technological Innovations in Test Equipment

Integrated circuit testing companies develop high-performance carrier boards for chip testing. Their core functions include connecting the chip to the test equipment, supplying power and transmitting control signals to the chip, supporting data collection by the test equipment, and automatically reconfiguring connection methods to complete all necessary test items. This programmable interconnect design can also optimize the usage efficiency of various input interfaces of the test machine, and these carrier boards are custom-developed for specific chips. Ideally, the switches used on test boards should have perfect electrical characteristics: no signal attenuation, no signal distortion, minimal size, zero power consumption, and instantaneous switching. In the past, because the impact of switches on testing was small, engineers could make certain compromises in design; but today's stringent requirements for ultra-high-speed interfaces mean the industry urgently needs new switch solutions.

In traditional test systems, signal switching is implemented by electromagnetic relays, but their performance falls far short of the ideal switch standards mentioned above. Even the smallest RF electromagnetic relays are still relatively large; and because electromagnetic relays switch through mechanical movement of physical contacts, switching speed is slow, causing delays in the testing process; at the same time, their mechanical nature means relays wear out after many switching cycles, reducing reliability. Another type of signal switching solution uses semiconductor switches, which can solve some shortcomings of electromagnetic relays but suffer from high on-resistance, causing test signal attenuation, and their nonlinear operating characteristics lead to signal waveform distortion in high-speed interfaces. During the R&D process of high-bandwidth integrated circuit test systems, the emergence of a new type of switch became a breakthrough — these switches are manufactured using MEMS technology derived from mainstream integrated circuit processes. AI During the R&D process of high-bandwidth integrated circuit test systems, the emergence of a new type of switch became a breakthrough — these switches are manufactured using MEMS technology. Monroe Microsystems' Ideal Switch brings multiple key advantages to integrated circuit testing: its purely ohmic signal path achieves near-zero on-resistance, extremely high resistance in the off state, and very low switch power consumption; its linear operating characteristics cover the full frequency range from DC to tens of gigahertz, combined with sub-microsecond high-speed switching capability, making it better suited than traditional solutions to meet the stringent requirements of chip testing for high speed and high signal integrity. 10 Compared to traditional solutions, it better meets the stringent requirements of chip testing for high speed and high signal integrity. AI Chip testing for high speed and high signal integrity.

Artificial intelligence is expected to drive the birth of countless products and services, many of which are still in the imagination stage but are close to realization.

News source: Semiconductor Vertical