SMIC achieves 30% yield, breaking through U.S. sanctions; AI chip revenue may halve.

Recently, an analysis report from Morgan Stanley, a renowned U.S. investment bank, has stirred up quite a buzz in China's tech and finance sectors.

The report’s core message zeroes in on China’s largest chipmaker, SMIC, and delivers a rather grim forecast: due to production yield issues, the projected revenue for China’s AI chips could be slashed by as much as half.

A key figure in the report—30% yield—has particularly become the focus of public discussion.
What does this number actually mean?

Is it truly signaling the challenges facing China's high-end chip manufacturing, or does it instead reveal the harsh reality of a tough battle to break through amid relentless global restrictions?

To understand the deeper meaning behind this, we need to start from the beginning.

First, let’s use a relatable example to explain what “yield” means.

Imagine a top-tier bakery using a single, massive dough sheet to craft exquisitely detailed cookies—this dough sheet is like the "wafer" in chip manufacturing, with each tiny cookie serving as a "chip."

So-called yield refers to the proportion of cookies that are successfully baked, remain intact, and are ready for sale out of the total number produced.

If the yield is 90%, it means that out of 100 cookies, 90 are defect-free—truly an efficient production process.

But if the yield is only 30%, it means that out of the 100 cookies painstakingly made, 70 will end up as defective waste, leaving just 30 ready to be sold.

Now, let’s take another look at Morgan Stanley’s report.

The report predicts that by the end of 2025, SMIC's yield for manufacturing Huawei's advanced AI chip, the Ascend 910B, may remain as low as 30%.

The direct consequences of this are obvious.

On one hand, there's the sharp rise in costs.
Because the cost of that massive "flatbread" (the wafer) is fixed, most of the expenses now have to be covered by the small portion of successful "cookies" (the chips).

The report even estimates that, at this yield rate, the cost of a single Ascend 910B chip could reach as high as 50,000 RMB this year.

This figure sounds staggering, and the low yield rate is precisely the main reason driving up costs.

On the other hand, production is severely constrained.

Low yield means that even if the production line runs continuously, the number of finished products delivered in the end will remain quite limited.

The report estimates that by 2025, SMIC may be able to produce 7,000 wafers per month. However, after accounting for a 30% yield loss, the actual number of functional chips produced will be significantly lower—clearly insufficient to meet the massive demands of China's burgeoning AI market.

So, here's the key question: Why is the yield so low?

This isn’t because Chinese engineers lack technical expertise—it stems from an uneven contest instead.

It is widely known that the most ideal tool for manufacturing advanced 7-nanometer chips is the extreme ultraviolet (EUV) lithography machine produced by ASML, a Dutch company.

It’s like an ultra-precise, miniature "carving knife," effortlessly etching incredibly complex circuits onto silicon wafers.

However, due to U.S. sanctions, SMIC is unable to obtain this state-of-the-art equipment.
All they have at their disposal are next-generation deep ultraviolet (DUV) lithography machines.

It goes without saying how challenging it is to use DUV equipment to accomplish tasks that would normally require EUV technology.
It’s like asking a master sculptor to abandon their precision laser tools and instead use an ordinary carving knife to create a miniature masterpiece.

To bridge the gap in tools, Chinese engineers have had to adopt a sophisticated technique known as "multi-pattern lithography."

Simply put, it’s about repeatedly exposing and etching—much like creating a meticulous brush painting—carefully "drawing" the intricate circuitry, stroke by stroke.

This process is incredibly tedious—each additional step significantly multiplies the risk of error.

At the nanoscale, even the tiniest deviation at any point can render the entire chip unusable.

Therefore, this 30% yield isn’t a failure—it’s precisely the result of sheer determination and ingenuity, painstakingly "wrought" under the challenging constraints imposed by limited equipment.

Behind every successful chip lies immense effort—and a steep price tag in trial and error.

Faced with such a challenging situation, we can also see the wisdom and resilience of Chinese enterprises as they tackle these obstacles, as highlighted in the report's detailed insights.

The report noted that Huawei's next-generation product, Ascend 910C, features an architecture built by packaging two 910B chips together.

This is actually an advanced packaging technology known as "Chiplet" (small chip).

This approach is brilliantly clever: since manufacturing a single, massive, and flawless monolithic chip yields extremely low returns, it’s better to take a step back and settle for two smaller, more straightforward chips—then efficiently connect them to achieve the same powerful performance.

It’s like building a giant bridge— if a single, monolithic, oversized pier is hard to manufacture, you can instead assemble multiple standardized, easier-to-produce smaller piers into a sturdy, functional structure.
This flexible, adaptive solution effectively sidesteps the bottleneck of excessively low yield rates for single chips, paving a practical and viable path to ensure the supply of cutting-edge AI computing power.

More importantly, yield itself is a dynamically evolving process.

In the semiconductor industry, any new process inevitably goes through a "ramp-up" phase in its early production stages, as yields rise from low levels—this is true even for industry leaders like TSMC.

30% could just be a figure for the initial stage.

Morgan Stanley's report itself also predicts that SMIC's yield is expected to rise to 70% by 2027.

From 30% to 70%, this isn’t just a numerical increase—it represents the ongoing maturation of production processes, the continuous accumulation of engineers' expertise, and a significant drop in manufacturing costs.

Once the yield reaches 70%, it means that, with the same wafer input, chip production will more than double, and the cost per individual chip will also drop significantly—reshaping the entire industry landscape in the process.

Therefore, when we examine this report comprehensively, we arrive at a deeper conclusion.

This seemingly pessimistic report actually underscores, from one perspective, a critically important fact: despite the extreme pressure of external technological blockades, China has already developed the capability to produce cutting-edge 7-nanometer chips.

The current focus of the debate has shifted from "can it be built?" to questions about "how much can be built" and "how high the costs will be."

This in itself is a major strategic breakthrough.

A 30% yield rate and high costs are the price we must pay to break free from technological constraints and achieve independent, controllable supply-chain capabilities—challenges that represent an inevitable, yet temporary, growing pain in this critical battle for technological advancement.

The revenue figures—projected in the report to range from tens of millions to over 100 million—are perhaps modest within the vast semiconductor market, but their significance goes far beyond that.

It signifies that China is painstakingly building its own high-end AI chip supply chain, safeguarding the most critical foundation for the future development of the nation's artificial intelligence strategy.

Though this path is fraught with thorns, every step is taken firmly and steadily.